10月24日:Patrice Quinton
發布時間:2019-10-21  閱讀次數:495

報告題目:Hardware Synthesis of Parallel Data-Flow Systems

報告人: Patrice Quinton 教授(ENS Rennes

報告時間:10月24日10:00—11:00

報告地點:數學館201

主持人:陳儀香 教授

報告摘要:The design of parallel algorithms for hardware accelerators requires transformations to be done on the initial algorithm descriptionusually given in the form of loops in an imperative language. We consider data-flow applications involving parallel calculations for each flow element. We show how we can represent these calculations as recurrence equations, through the use of a specialized function language called Alpha. Transformations of Alpha programs lead to parallel implementations that can be translated to a hardware description language such as Vhdl. We illustrate these notions with the MMAlpha software tool developed at IRISA.

 

 

報告人簡介:Patrice Quinton is professor emeritus at ENS Rennes, France. He graduated from ENSIMAG (Grenoble) in 1972, obtained a PhD in the University of Rennes 1 in 1980. He was successively researcher at the CNRS in Rennes, then Professor at the University of Rennes 1, and Professor at ENS Rennes. He was President of ENS Rennes from 2014 to 2015. His research interest are Computer architecture and parallel architectures.

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